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| Both sides previous revision Previous revision Next revision | Previous revision | ||
| en:netzer:pins [2014/01/04 18:03] – Added common overview svesch | en:netzer:pins [2025/06/11 20:42] (current) – external edit 127.0.0.1 | ||
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| + | ====== Netzer pin map ====== | ||
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| + | {{ : | ||
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| + | ===== Pins of pin header JP1 ===== | ||
| + | |||
| + | ^ Name ^ Description ^ | ||
| + | | INT | [[pins# | ||
| + | | CLK | ::: | | ||
| + | | MI | ::: | | ||
| + | | MO | ::: | | ||
| + | | CS | ::: | | ||
| + | | IO4 | ::: | | ||
| + | | IO5 | ::: | | ||
| + | | IO3 | ::: | | ||
| + | | VA2 | Connection for [[pins# | ||
| + | | VB2 | Connection for [[pins# | ||
| + | |||
| + | |||
| + | ===== Pins of pin header JP2 ===== | ||
| + | |||
| + | ^ Name ^ Description ^ | ||
| + | | RST | Use this pin to reset Netzer. The signal is low active (this means 0 resets Netzer). The Reset signal can also be used for waking up Netzer from sleep mode (after shut down). The pin is optional and can be left open.| | ||
| + | | 3V3 | Pin for power supply. Minimum voltage is 3.1\ V. Maximum voltage is 3.6\ V.| | ||
| + | | GND | Ground potential.| | ||
| + | | IO0 | [[pins# | ||
| + | | IO1 | ::: | | ||
| + | | IO2 | ::: | | ||
| + | | TX | ::: | | ||
| + | | RX | ::: | | ||
| + | | VA1 | Connection for [[pins# | ||
| + | | VB1 | Connection for [[pins# | ||
| + | |||
| + | |||
| + | ===== Power-over-Ethernet (PoE) ===== | ||
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| + | The four connections VA1, VA2, VB1 and VB2 are connections from the network socket where a Power-over-Ethernet supply can be connected to. | ||
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| + | {{ : | ||
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| + | The image shows an example circuit. Here the PoE supply AG9033 of Silver Telecom is used. | ||
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| + | ====== Overview over all GPIO signals ====== | ||
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| + | Here only some common informations are shown. | ||
| + | The implemented functionality of a single IO depends on the single project. | ||
| + | |||
| + | ^ Netzer Name ^ ID ^ PIC Pin ^ Maximum output current ^ Maximum input voltage ^ Functionality ^ | ||
| + | | SPI_INT | j | RC2 | 25 mA | 5,5 V | Interrupt pin of the SPI slave module, PWM capable | | ||
| + | | SPI_CLK | k | RC3 | 25 mA | 5,5 V | Clock line of the SPI module or I2C module | | ||
| + | | SPI_MI | l | RC4 | 25 mA | 5,5 V | Data input of the SPI module, data line of the I2C module | | ||
| + | | SPI_MO | m | RC5 | 25 mA | 5,5 V | Data output of the SPI module | | ||
| + | | SPI_CS | i | RF7 | 2 mA | 5,5 V | Select input of the SPI slave module | | ||
| + | | RX | h | RC7 | 25 mA | 5,5 V | UART Receive line | | ||
| + | | TX | g | RC6 | 25 mA | 5,5 V | UART Send line | | ||
| + | | IO0 | a | RB0 | 25 mA | 5,5 V | Interrupt capable input | | ||
| + | | IO1 | b | RB1 | 25 mA | 5,5 V | Interrupt capable input | | ||
| + | | IO2 | c | RB2 | 25 mA | 5,5 V | Interrupt capable input | | ||
| + | | IO3 | d | RD1 | 8 mA | 5,5 V | PWM capable | | ||
| + | | IO4 | e | RA2 | 2 mA | 3,3 V | ADC capable | | ||
| + | | IO5 | f | RA3 | 2 mA | 3,3 V | ADC capable | | ||